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Simulation news, articles & best practices

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Electronics & Embedded

PCB-level circuits, real-time controllers, IoT networks, hardware-in-the-loop

20 articles

Article

Cadence Genus Synthesis Solution: RTL-to-Gates Optimization and Timing Closure for Advanced-Node SoC Design

Cadence Genus Synthesis Solution combines a physically-aware GigaOpt engine with machine-learning-driven QoR prediction to achieve timing closure in synthesis rather than deferring it to place-and-route. This article covers the complete Genus workflow — from MMMC constraint setup and hierarchical ILM generation through multi-Vt power optimization and Innovus handoff — with practical Tcl recipes for 7 nm and below SoC designs. Engineers will learn how to integrate Genus into CI/CD pipelines to catch timing regressions within hours of RTL commit.

By Jeff 155 views
Article

Mentor Questa Formal Verification: Exhaustive Property Checking with SystemVerilog Assertions

Mentor Questa Formal Verification uses Bounded Model Checking and IC3/PDR engines to mathematically prove or disprove SystemVerilog Assertion properties across all possible input sequences, eliminating the coverage gaps that simulation cannot reach. This article covers the Questa Formal architecture, practical SVA authoring guidelines, command-line workflow, and state-space mitigation techniques including abstraction, case splitting, and assume-guarantee reasoning. Engineers will learn how to integrate block-level formal verification into CI/CD pipelines to catch control-logic bugs before simulation regression completes.

By Jeff 82 views
Article

Percepio Tracealyzer: RTOS Trace Visualization and Runtime Analysis for Embedded Systems

Percepio Tracealyzer provides non-intrusive, microsecond-resolution trace recording and visualization for RTOS-based embedded systems, enabling engineers to diagnose priority inversions, measure task response times, and verify deadline compliance across thousands of activations. Integrated via the lightweight TraceRecorder library, it supports FreeRTOS, Zephyr, ThreadX, and other major RTOS platforms with streaming or snapshot capture over J-Link RTT, UART, or TCP/IP. This article covers the key analysis views, TraceRecorder integration workflow, and a systematic methodology for deadline verification using Tracealyzer's response time and CPU load analysis tools.

By Jeff 72 views
Article

Cadence Xcelium Parallel Simulator: Leveraging Multi-Core Simulation for Large-Scale UVM Testbenches

Cadence Xcelium Parallel Simulator distributes SystemVerilog and UVM testbench workloads across multiple CPU cores using a proprietary parallel execution engine, delivering 4–6× speedup on multi-clock SoC designs. This article covers the parallel simulation architecture, practical xrun configuration for UVM testbenches, performance benchmarks by design type, and best practices for integrating parallel simulation into farm-based regression flows targeting functional coverage closure.

By Jeff 128 views
Article

Synopsys Verdi: Automated Debug and Coverage Analysis for SoC Verification

Synopsys Verdi is the industry-standard debug and coverage analysis platform for SoC verification, combining SmartTrace root-cause analysis, protocol-aware waveform decoding, and vManager coverage database management to accelerate closure from simulation to sign-off. This article covers the complete Verdi workflow — from FSDB/KDB integration with VCS and VC Formal through per-module coverage dashboards and waiver tracking — with practical command-line recipes and best practices for teams targeting functional safety standards.

By Jeff 290 views
Article

Synopsys PrimeSim HSPICE: Advanced Noise Analysis for High-Speed SerDes and Memory Interface Design

Synopsys PrimeSim HSPICE provides a comprehensive noise analysis suite — including transient noise Monte Carlo, PSS/PNOISE phase noise simulation, and statistical eye diagram generation — that goes far beyond standard .NOISE sweeps. This article covers the complete HSPICE noise analysis workflow for 56G/112G SerDes and DDR5/LPDDR5 memory interfaces, from jitter decomposition using the dual-Dirac model to BER-extrapolated eye opening measurements. Engineers will learn how to configure transient noise injection, rank noise source contributions to phase noise, and generate compliance-ready eye diagrams at target BER levels.

By Jeff 174 views
News

MathWorks R2026a: Simulink Copilot, Agentic Toolkits, and FMU Builder Transform Model-Based Design

MathWorks has released MATLAB and Simulink R2026a, introducing Simulink Copilot for AI-grounded model assistance, the MATLAB and Simulink Agentic Toolkits for autonomous agent-driven workflows via MCP, and the new Simulink FMU Builder for streamlined model exchange. The release marks a significant step toward AI-native simulation environments for embedded systems and control design.

By Jeff 668 views
News

MathWorks Launches MATLAB Copilot and Redesigned Desktop in 2025a Release

MathWorks has released MATLAB and Simulink 2025a, introducing MATLAB Copilot—a generative AI assistant for code generation, debugging, and test automation—alongside a fully redesigned desktop environment. The release also delivers major Simulink enhancements including a Python Code Block, local solvers for model references, and a new Simulink Scope, making it one of the most feature-rich updates to the platform in recent years.

By Jeff 444 views
Article

Cadence Virtuoso ADE Assembler: Hierarchical Multi-Corner Simulation Management for Analog IC Design

Cadence Virtuoso ADE Assembler is the industry-standard environment for orchestrating multi-corner PVT verification of analog and mixed-signal ICs, enabling engineers to define test plans, manage process/voltage/temperature corners, and run thousands of simulation jobs across distributed compute farms. This article covers the complete ADE Assembler workflow—from corner definition and distributed job dispatch to specification-driven pass/fail checking and sensitivity analysis—with best practices for automotive and high-reliability analog design teams.

By Jeff 458 views
Article

ANSYS SIwave: PCB Signal Integrity and Power Integrity Simulation for High-Speed Digital Designs

ANSYS SIwave is a purpose-built electromagnetic simulation tool for PCB signal integrity and power integrity analysis, enabling engineers to extract S-parameters, run IBIS-AMI eye diagram simulations, and compute PDN impedance profiles directly from the routed board layout. This article covers the complete SI/PI workflow — from ODB++ import through DC IR-drop, AC PDN impedance, and channel compliance reporting — with best practices for high-speed designs above 1 GHz.

By Jeff 925 views
Article

Keysight ADS Momentum: 3D Planar EM Simulation for High-Frequency PCB and RFIC Design

ADS Momentum's Method-of-Moments solver enables engineers to co-simulate planar passive structures alongside active circuit models within Keysight ADS, delivering accurate S-parameter extraction for PCB and RFIC designs from DC to 110 GHz. This article covers the practical workflow—substrate stack-up definition, mesh convergence, and EM-circuit co-simulation—that transforms Momentum into a first-principles design tool rather than a final sign-off step.

By Jeff 595 views
News

Neuromorphic Computing Breakthrough: Brain-Inspired Chips Solve Complex Physics Equations with Unprecedented Energy Efficiency

Sandia National Laboratories researchers have developed the NeuroFEM algorithm, enabling neuromorphic computers to solve partial differential equations with a fraction of the energy required by traditional supercomputers. This breakthrough could revolutionize high-performance computing for climate modeling, aerospace simulations, and national security applications.

By Jeff 199 views
News

Ansys 2025 R2 Introduces AI Engineering Copilot for Intelligent Simulation Workflows

Ansys releases its 2025 R2 software update featuring the Engineering Copilot, an AI-driven virtual assistant that provides real-time guidance and enables physics-based simulations up to 1000x faster than traditional methods. The release integrates AI capabilities across the entire Ansys portfolio, democratizing advanced simulation for engineers.

By Jeff 438 views